Calling all Music Lovers! Just another addressing mode

In my never-ending quest for new ways to modify the instruction formats in my example architecture so as to minimize the memory bandwidth used for fetching instructions, I have come up with yet another bizarre permutation, shown on the bottom of the page

wherein I achieve an eight-bit opcode for both register-register instructions (by avoiding the need for filling a three-bit field with zero to distinguish that format from memory-reference instructions by explicitly indicating the addressing mode) and for memory-reference instructions.

In the case of memory-reference instructions, I do so by following the System-360, and exiling the indication of the base register to the 16-bit halfword following the first half of the instruction that gives the address displacement value... but instead of accepting a memory page of a measly 4,096 bytes (as with the 360 or my short page mode; it could have been 8,192 bytes in short page mode, but I decided if the page was going to be so drastically shortened anyways, I'd add a bit for indirect addressing) I insist on keeping the page size at 32,768 bytes, thus only cutting it in half.

I do *that* by putting in base register 0 (never added to the address as a true base register) two fields indicating which of the eight base registers is selected by each of the two possible values of the first bit of the address.

And, of course, the reason for the breastle of this post is that the natural name for this mode turned out to be a vile pun... double base mode.

I even get enough opcode space to squeeze in scratchpad instructions as well, but I end up having to define how five-bit opcodes are translated to seven-bit opcodes.

John Savard Usenet Zone Free Binaries Usenet Server More than 140,000 groups Unlimited download