IBM 610 workstation computer 3419
it isn't that memory technology has lagged. there are certain physical constant issues that existing paradigms are constrained by. you may have to significantly change the paradigm to get around the limitations of various physical constants (like maximum signal propogation time).
tera (now renamed cray) attempted one such paradigm change with mbuttive threading and eliminated cache all together. this is similar to the 370-195 dual i-stream threading change. normal codes were only keeping the 195 pipeline half-full (and ran at half the peak 195 instruction thruput rate). the idea was to add a second instruction stream in hopes that would keep the (single) 195 pipeline full and hopefully maintain aggregate peak instruction thruput rate (by having dual i-stream-threads). tera talks about things like 256 concurrent threads.
misc. past posts mentioning tera
in the late 70s, i started noticing similar technology system mismatches with disk. i got in trouble with the disk division by claiming that disk technology system thruput had declined by a factor of 10 over a period of 10-15 years (i.e. disks thruput got five times faster but processor got 50 times faster and the amount of electronic memory increased by 50 times). as a result, you saw paradigm shift to significant amounts of electronic file caching ... at all levels in the system (analogous to use of cpu caching to compensate for memory latency restrictions).
misc. past posts:
IBM 610 workstation computer 3420
i don't think it is necessarily gender limited. there may be actually be two separate issues ... one is...