IBM 610 workstation computer 3429

+--------------- I don't believe that this is pure hardware. The software has to be able to at least get-set a status. +---------------

Why?

Yes, there are usually maintenance functions for looking-manipulating the state of the caches, but you have to stop normal system operation completely to use them.

Under normal operation, the whole cache-coherency stuff "just works", automatically, in hardware. Yes, "pure" hardware.

+--------------- This may be where we are talking past each other. I'm thinking within the context of the monitor (kernal to you Unix types) and you are reading what I write within the context of a user application or user mode monitor code. I am not. +---------------

As I said elsewhere, modern operating systems are just as multi-CPU, multi-threaded, "SMP" if you must, in the kernel as in user mode. The only reason I said "user mode" was to simplify the discussion by ignoring those few functions the kernel does that *must* know about which CPU is which, which memeory is which, etc.

+--------------- The "right thing" is caused by choices made in by the monitor software. +---------------

When the program first gets loaded, maybe. But once it's running, the operating system has nothing to do with maintaining cache coherency. It's all in the hardware.

+--------------- Again, we did not have the luxury of a write-thru cache. +---------------

I think you have it backwards: It's write-back caches that are the "luxury", because of the tremendous performance advantages they allow. Write-thru caches are simpler to implement in multi-CPU systems, (which is why x86 uses them), but the performance sucks.

-Rob

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