IBM 610 workstation computer 3441
IBM 610 workstation computer 3447
Who is the I in this last sentence? I am stating that the I is the OS. It cannot be hardware. It is only the OS who knows which...
part of the issue is fault isolation. also, i think jim gray, after he left sjr for tandem ... published a paper in the early 80s about major sources of faults were software rather than hardware (hardware reliability was significantly improving while software reliability wasn't seeing similar improvements ... and the amount of software was drastically increasing).
isolating various kinds of software faults can be a lot harder in a shared memory configuration.
i mentioned that one of the reasons that we did ha-cmp cluster scale-up was that 801-rios had no provisions for cache consistency ... and so cluster approach was about the only way left for adding processors. however, we also did quite a bit of work on fault isolation and recovery as part of ha-cmp product.
recent post in this thread ... mentiong distribute lock manager for ha-cmp and some aspects of database logs and commits as part of recovery.
an earlier scenario i faced was trying to get operating system into bldg. 14 disk development machine room. they had tried doing testing of components in development in operating system environment and found things like the (system software) MTBF for MVS was on the order of 15 minutes with a single test cell.
IBM 610 workstation computer 3442
the or virtual so a stop (until That's how the SMP biz got started but this is no longer true. Take a second look at what you two are...
I undertook to rewrite the operating system input-output supervisor to be absolutely bullet-proof ... so they could not only perform testcell testing in an operating system environment ... but could do multiple concurrent testcell testing ... concurrently with other activity. Part of the effort in the redesign and rewrite was having a rich source of i-o errors ... a single testcell might generate more errors in 15 minutes (and-or other types of failures modes) than a typical datacenter with football field full of disk would see in a year (in addition to exhibiting behavior that was precluded by standard architecture specified operation). misc. past postings mentioning work for bldg. 14 and bldg. 15
part of this intersects the scheduling of the air bearing simulation job mention in other posts in this thread
bldg. 14 (engineering lab) and bldg. 15 (product test lab) got early-first processor models. bldg. 15 took delivery of one of the first 3033s (long before they shipped to customers) for testing with current and new disks. the 3033 had instruction thruput of about half that of peak 370-195 (but was the same for most workloads). I had gotten the rewritten ios operational and most of the machines in bldg. 14 & 15 were running it. previously machines had to be serially scheduled for stand-alone testing, a single testcell at a time. now any testcell could do its testing as needed w-o having to wait for stand-alone test time. with operating system environment ... even with multiple testcell testing going on, the 3033 rarely got more than 5percent busy. as a result, we now had essentially a whole lot of unused cpu power to play with. while there was one week to 3 month backlog for scheduling work on the 370-195 in bldg. 28, just across the street, in bldg. 15, we had seemingly unlimited amounts of processing power immediately available. so one of the things we did was get the air-bearing simulation application running on the 3033 in bldg. 15 ... where it got nearly immediate availabiltiy of almost all the processing it needed. Not only did getting fixing operating system so that it was useable in bldg. 14 & bldg. 15 ... significantly improve productivity of new hardware testing, it also made available significant amounts of additional cpu power that we put to use for things like getting the air-bearing simulation part of designing new thin-film floating heads speeded up.
IBM 610 workstation computer 3443
As long as we agree on the definitions, I'm not too interested in what it's called. ;-) The L2 caches are available to all CPU ports, that's...
IBM 610 workstation computer 3444
are memory cache board. main is a Sure. But we are viewing the system from differently shaded glbuttes :-). That's where we get into...
IBM 610 workstation computer 3446
On Sun, 26 Feb 2006 13:37:25 +0000, jmfbahciv Call L2's memory then. If an L2 contains dirty data...