IBM 610 workstation computer 3442

the or virtual so a stop (until

That's how the SMP biz got started but this is no longer true. Take a second look at what you two are arguing about. There are now multiple stages of "memory" not all the same speed, capacity nor available to all CPU ports. I think (haven't spent much time thinking about this) that all the memory areas that a CPU uses for its scratch pad should be accessible to only that CPU. But I haven't thought about all flavors of data; I'm very weak in comm matters.

It will matter when that becomes your bottleneck. Like I said in another thread, you guys need to think about basic plumbing common sense. If you double the thruput of on T-joint, your next bottleneck will be the next joint.

upsurped. This has the side effect that now nobody knows which data is right.

This is a bandage that doesn't even cover the cut. I'll try to think of an analogy that demonstrates the problem because I don't know enough about the hardware lingo. The problem you guys are having is that you have moved the main memory function, all of it, to be located in each CPUs' cache. This isn't a problem when the system consists of one, and only one, CPU. The processing locks itself because it works alone. You may even be able to apply bandaid when there are two CPUs. But you start putting in three or more with the speeds of today, there's no way each CPU can guarantee that the data it just computed is correct.

This "ownedness" means that each item has to have a latchkey buttoiated with it. No wonder their memory speed problems. You are requiring the guy running with the football towards the goal posts to have to open a locked door at every yard line.

I understand that there are several hardware ways of dealing with this problem. Unfortunately, the software has to undo the mess.

Has anybody done any real SMP on them?

BAH