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IBM 610 workstation computer 3455


On Sat, 25 Feb 2006 02:24:30 +0000, Andrew Swallow

They work when you have more than one CPU too. This is a point that both you anBAH are completely missing.

Huh?

Wow! You can't write main memory? That's news to me!

You just said that main memory simulates ROM. I think you need to take computer architecture 101 arain.

IBM 610 workstation computer 3456
Keith The point that you are missing is that *I have seen them fail.* BAH may have too. Modern instruction sets containing index registers and return instructions from have practically eliminated...

Irrelevant to what we're discussing.

Who cares what memory looks like to the disk? I care what it looks like to the processor(s). Disks are dumb. They don't do any work, simply serve data the processor requests.

...and this is from the perspective of the disk?

That's true of any system running multiple threads. That's why we have locks.

Only for data shared between threads. Data owned by one thread doesn't need locks, and it can run on any provcessor in the system without software intervention.

Sure, and the ambulance takes the wounded thread to the hospital (or grave).

Disk handler? No, through the memory handler.

You had crappy hardware-software, or both. In any case, SMP works with write-back caches. There are simply too many examples of SMP systems with write-back L2s to make the case otherwise.

-- Keith


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IBM 610 workstation computer 3454