Intel engineer discusses their dualcore design 2164

303x machines were organized to use the 303x channel director.

the 370-158 had integrated channels ... i.e. the 158 engine was shared between the microcode that executed 370 instructions and the microcode that executed channel (I-O) programs.

for the 303x channel director they took the 370-158 and removed the microcode that executed 370 instructions leaving just the channel end microcode.

a 3031 was a 370-158 remapped to use a channel director box i.e. a 3031 was a 370-158 that had the channel program microcode removed ... leaving the engine dedicated to executing the 370 instruction microcode.

in some sense a single processor 3031 was a two 158-engine smp system ... but with one of the 158 engines dedicated to running 370 instruction microcode and the other processor dedicated to running the channel program microcode.

a 3032 was a 370-168 modified to use the 303x channel director.

a 3033 started out being a 370-168 wiring diagram remapped to new chip technology. the 168 chip technology was 4 circuits per chip. the 3033 chip technology was about 20% faster but had about ten times as many circuits per chip. the initial straight wiring remap would have resulted in the 3033 being about 20% faster than 168-3 (using only 4 cicuits-chip). somewhere in the cycle, there was a decision to redesign critical sections of the machine to better utilize the higher circuit density ... which eventually resulted in the 3033 being about 50% faster than the 168-3.

basic 3033 was single processor (modulo having up to three 303x channel directors for 16 channels). you could get two-processor (real) 3033 smp systems (not dual i-stream).

there was some internal issues with the 3031 being in compebreastion with 4341 ... with the 4341 being significantly better price-performance. A cluster of six 4341s also were cheaper than a 3033 also with much better price-performance and higher aggregate thruput. Each 4341 could have 16mbytes of real storage and 6channels for an aggregate of 96mbytes of real storage and 36 i-o channels. A single processor 3033 was still limited to 16 i-o channels and 16mbytes.

somewhat in recognition of the real stroage constraint on 3033 thruput ... a hack was done to support 32mbytes of real storage even tho the machines had only 16mbyte addressing. A standard page table entry had 16bits, 12bit page number (with 4k pages giving 24bit real storage addrssing), 2 defined bits, and two undefined bits. The undefined bits were remapped on the 3033 to be used in specifying real page numbers. That allowed up to 14bit page number ... with 4k pages giving up to 26bit real storage addressing (64mbytes). channel program idals had been introduced with 370 ... allowing for up to 31bit real storage addressing (even tho only 24bits were used). This allowed the operating system to do page I-O into and out of storage above the 16mbyte line.

around the same time that the product test lab (bldg. 15) got their 3033, they also got a brand new engineering 4341 (for the same purpose doing channel disk i-o testing). we could co-op the 4341 in much the same way that the 3033 was co-oped. In fact, for a period of time, I had better access to the 4341 for running tests than 4341 product people in endicott did; as a result I got asked to run some number of benchmarks on the bldg. 15 4341 for the endicott 4341 product people. minor past refs:

some number of past posts on 303x channel director:

in the late 70s and early 80s, 4341 competed with and sold into the same market segment as vax machines

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