On the 370165 and the 36085 4010

not exactly 360-85 info (which I have no direct info)

along the way there was the 3031 and 3032 (in addition to the 3033).

the 303x line was differentiated by the "channel director" ... the 158 had integrated channels with the machine engine shared between 370 microcode and channel microcode. for the 303x, they packaged the 158 engine w-o the 370 microcode ... just the integrated channel microcode as the channel director. the 370-158 was then repackaged as the 3031 working with a channel director (i.e. effectively now a dual processor with two engines ... however one with only the 370 microcode and one with only the channel microcode). the 168 was repackaged as the 3032 to work with the channel director.

the 3033 started out as 168 wiring diagram mapped to denser and faster chip technology ... but only using the same number of circuits per chip as used in the 168 (meaning only about 20percent faster). because of compebreastion and other issues, there was some rework of the logic to use some of the additional circuits per chip ... eventually the 3033 was 50percent faster than 168 (approx. 4.5mips instead of 3.0 mips).

part of the 3033 folklore was that it was an extremely hurryup project after FS had been end

since so much corporate effort had been diverted to FS during that period ... that there was very little in the 370 pipeline (i.e. FS doctrine was that FS was going to completely replace 370).

the 3081 architecture code name was 811 for nov78 ... extending 370 architecture to 31bit virtual addressing (not that the 360-67 previously had both 24-bit and 32-bit virtual addressing) and misc other features ... no FS features (the other stuff is pure rumor) ... just extending the 155-158 microcoded lineage to faster technology (while 165-168 lineage was much more hardwired).

The FS folklore is that the final nail in the FS coffin was a study by the houston science center that showed if FS architecture was implemented on the fastest, currently available technology (370-195), that 370-195 applications would have thruput of about 370-145 (somewhere around a factor of 20-30 times slowdown). optimized codes would peak around 10mips on 195 ... a lot of more conventional stuff ran around 5mips (no branch prediction or speculative end, branches just drained the pipeline ... except for special case of looping within the pipeline buffer). 370-145 was in the .3mip to .5mip range.

3081 was going to be a multiprocessor offering only. initial 3081D had approx. two five mip engines. later 3081K had pair of approx. 7mip engines (14mips aggregate). because of some operating systems not having multiprocessor support (primarily TPF, the old airline control program), they were eventually forced to ship a single processor 3083. as an aside, prior to 3081, multiprocessors had been totally independent systems that got lashed together ... but could be separated and run as independent single processor complexes. they differentiated3081 as being "dyadic" ... which it had two processors ... it couldn't be separated into two independent single processor systems (although there was 3084 which was essnentially a pair of 3081s).

a recent posting including an old discussion about some of the differences between the predominately microcode 3081 and the much more hardwired 3090 ("trout" in the following refers to 3090):

misc. past postings mentioning 3083-tpf:

misc. past postings mentioning 303x channel director: