POWER6 on zSeries

Shmuel Metz , Seymour J.

ref:

there is some indication that this (mvs performance buttist on 3033) may have been the early driving factor behind amdahl's development of macrocode mode. the issue is that horizontal microcode programming (on the high-end machines) is significantly much more complex than 370 programming. by this time (at least), 370 instructions (on the high-end machines) were running at direct hardware speed ... so it was difficult to demonstrate any of the ECPS-like speed-ups that we obtained from doing simple migration of 370 kernel pathlength into microcode on the low-mid-range 370s (where it avg. ten vertical microcode instructions 10:1 speedup on 148 and 4341).

the mvs "performance buttist" for the 3033 appeared somewhat to be arbitrary changes to the architecture-features of the hardware (since it was difficult to demonstrate any actual performance improvement of simply changing 370 instructions into microcode instructions). if that was going to be how the game was to be played ... amdahl was going to need to get much more efficient at playing the game and tracking architecture-feature changes. macrocode mode provided all the hardware feature appearnce of programming in microcode but with the productivity (and elapsed development time) of programming in 370.

once that level of machine feature delivery efficiency was obtained ... it was relatively easy to do additional features like hypervisor support ... restricted virtualization subset that didn't require the vm kernel. the response was pr-sm on 3090 which eventually evolved into the current lpar capability.

for a little drift, comp.arch n.g. has had a similar discussion thread

and a few comments on a online article that appeared yesterday about the 41yr old, new, new thing