The Soul of Barb's New Machine was creat 1131
oops, not exactly.
360-67 had test&set instruction and no caches.
charlie, while working on fine-grain locking in cp-67 smp kernel at the science center, invented compare&swap. The selection of the compare&swap mnemonic was a slight issue ... because the objective was coming up with something that was charlie's initials, CAS. neither test&set nor compare&swap are likely to ever be a single machine cycle operation since it involves a fetch followed by (at least) a (conditional) store operation. what it does have to do is serialize all proceesses so that the instruction is atomic (given the combined fetch and store characteristic, it is likely to be multiple machine cycles ... during which all processeros may be serialized).
The Soul of Barb's New Machine was creat 1132
glen herrmannsfeldt case. original cas, 370 cache machines were very strong memory model and store-thru cache. stores invalidated all...
compare&swap was added to 370 ... with a little work. The 370 architecture owners (padeges & smith) came batch that it was unlikely to be able to justify an SMP-only instruction. in order to get it justified for 370, a non-SMP justification was (also) needed. This was where the use description for mulbreasthreaded of (enabled for interrupts) application code originated. Mulbreasthreaded application code that was enabled for interrupts could safely update certain kinds of structures (whether running in uniprocessor or multiprocessor environment) because the instruction was atomic (would be interrupted in the middle with interrupt and possibly resume end of the application in a different thread). As part of the inclusion of compare&swap instruction in 370, it was expanded to be both single-word and double-word compare&swap instruction.
originally, the description of the possible uses appeared as "programming notes" in the 370 principle of operation ... packaged as part of the instruction description. In some later version of principle of operation, the description was moved to the appendix.
misc. science center, 545 tech sq. misc. smp, compare&swap, etc
comapre&swap instruction from esa-390 principle of operation
compare double and swap instruction from esa-390 princole of operation
appendix a.6 from esa-390 principle of operation; multiprogramming (aka mulbreasthreading) and multiprocessor examples: