Today's mainframeanything to new 552

microchips

FE service people had requirements that they could bootstrap diagnosis starting with probes and scope. the 3081 starting with TCMs where there wasn't anyplace to put probes ... and so there was a service processor that had manufactored probes into all sorts of places ... and the serice processor could be probed (and replaced).

the 3090 started out with going to have a 4331 running a custom vm370 release 6 ... as the service processor (possible to scope the 4331). before the 3090 shipped, this was eventually upgraded to a pair of 4361s as service processors (still using a highly modified vm370 release 6).

i provided some amount of code enhancements for the service processor code. the group supporting the highly modified vm370 was also one of the internal sites that picked on my debug analysis tool for supporting their operation (it never got released to customers ... but majority of the internal locations started using it ... including PSRs supporting customers).

3090 also introduced extended store. the constant march of ambundance of electronic memory was continuing. i had previously made comparison between 360-67 and 3081 and relative system disk performance declining by a factor of ten times. along the way, the abundance of electronic memory was being used to compensate for deficiency in disk performance (aka various kinds of caching). the problem with 3090 era was that you could get a lot more electronic memory than you could physically package within normal memory latency. as a result, they went to another memory level ... that was software managed as 4k pages. basically they used the paging metaphor for software to stage data between regular memory and extended store in 4k page operations. the extended store had a special high-speed and wide bus.

later when kingston was trying to craft hippi support on 3090 ... the standard 3090 i-o interfaces couldn't handle the rate ... so they cut into the side of the extended store bus to do the hippi attachment.

in the 3090 time-frame ... amdahl had come up with hypervisor support ... basically an abbreviated virtual machine with dedicated real storage allcoation. you could run vm370 in normal operation providing normal virtual machine ... and mvs in the hardware hypervisor with almost no "virtual machine" degradation. IBM responded with 3090 PR-SM which has since evolved into current day LPARS (logical parbreastions).

we had been attending hippi, fcs, and sci meetings (hippi basically by lanl trying to standardize the cray 800mbit-sec copper channel, fcs, by llnl trying to standardize a 1gbit fiber version of some serial technology they had, sci was some other fiber stuff out of SLAC).

ibm mainframe had done something with 200mbit escon ... which had been laying around pok since the late 70s. one of the rs-6000 engineers had taken escon ... increased it by about 10percent to 220mbit, redid it with much cheaper optical drives ... and made it full duplex (sla, seial link adapter). escon .. while pairs of unidirectional fiber ... preserved the half-duplex paradigm from the bus&tag cables. The rs-6000 engineer then started work on 800mbit SLA ... but we eventually manage to talk him into moving to FCS ... and he became the editor of the FCS standards document. There was some amount of contention in FCS meeting from POK channel engineers attempting to overlay the half-duplex paradigm (from escon and bus&tag cable) on the fundamentally full-duplex FCS.

the current generation of that is ficon ...

note in the above reference ... we had coined the terms and defined disaster survivability and geographic survivability for ha-cmp ... as contrast to simple disaster-recovery

another ficon description

... aka ficon is the upper layer protocols on top of FCS to turn a native FCS full-duplex paradigm ... into the old-style bus&tag half-duplex paradigm.

misc. past extended store posts instructions (was Re: Did Intel Bite Off More Than It Can Chew?) unmanned byte byte

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