Where should the type information be: in tags and descriptors 415

That is almost entirely sheer incompetence - and it is not just SPARC, but almost every RISC designer and most others.

There is absolutely no reason except dogma to require a single interrupt mechanism for everything, and some major reasons to not do it that way. As was done back in the 1960s. In particular, separating out the following four clbuttes has MbuttIVE benefits for scalability, reliability, simplicity, performance etc.:

Stop the world - I am about to fall off. Extreme machine checks, IPL interrupts etc. They need to halt all CPUs and flip one into an extreme state. They are global and not targetted.

Asynchronous (device etc.) interrupts, which could equally well be handled by FIFOs and dedicated threads or in several other ways. They should always be targetted appropriately, anyway, whether to specific threads, CPUs or whatever.

Supervisor calls, including TLB misses, which need to flip into kernel mode preserving the thread context and CPU. That code then decides what to do.

Thread-specific unprivileged ones, including floating-point fixup, the receipt of (trapped) signals etc. These should NOT flip into kernel mode, and need not cost more than an unpredicted branch plus a function call.

It is the lack of the last one that prevents applications using extension mechanisms. There is no need for the kernel to even know when such an interrupt is taken! Why should it?

Regards, Nick Maclaren.