On Tue, 04 Jan 05 13:04:20 GMT As I see it the cigarette lighter device has HDL (Hardware Definition Language) that says (for exampe) PDP 10 and HSL (Hardware...
keith easier instructions to
I don't think INTEL made the same trade-off at all, they had a far better process and about 2 orders of magnitude more transistors to burn for staters. I don't think 21064's trade off was "foolish" either, they were faced with Hobson's choice.
21064 : short pipeline, high clock. Very simple core. P4 : long pipeline, extremely high clock. 2 orders of magnitude more transistors, --ing huge core stuffed chock full of clever OoO stuff.
I don't think that's true. Intel's approach is quite simple, up the number of transistors on a die and use the new transistors for cache. By and large I think the cache-expansion thing is the simplest and most efficient way of upping performance. It is a neat trick because caches can exploit redundancy relatively easily compared to a CPU core, and that can be used to improve yield dramatically. It also gives the marketing wankers a really simple way to come up with new products.
As for architecture Intel placed it's size 15 plates on both sides of the "speed demon-brainiac" fence. 1) Itanic = slow clock, lots of FUs, "simple" scheduling logic, huge cache. 2) P4 = fast clock, complex scheduling logic, not so huge cache.
Alpha 21064 0.7 um, 3 L, CMOS 1,680,000 transistors 300 MHZ 431 PGA
PowerPC 601 0.6 um, 4 L, CMOS 2,800,000 transistors 80 MHz 304 PGA
Note that the PPC601 is *NOT* POWER, it was a 32bit chip vs Alpha's 64bits AND it had far more transistors, ran at a far lower clock and it was fabbed on a significantly more advanced process (note the 3L vs 4L as well as the slight feature size edge).
The 601 was not in the Alpha's league in terms of grunt either.
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You just pressed a key, didn't you? How do you learn to use that camcorder, by throwing bones on...