transputers again was: The dissolution of Commodore 2927

Now consider comparing subroutines with CISC instructions. And look at compilers analyzing statements from an HLL down to the level of emiting complex sequences of 'simple risk' instructions to replace multiplications or divisions. Subroutines: parbreastion the logic, allow independant checkout, improve code density. CISC instructions provide the same benefits and they are very rigorously checked during development whereas compilers : vary in quality, when reordering their output are more error prone etc. Now that more optimization can be done within CISC instruction end and code density, instruction issue are more of a consideration, and the improvements in compiler technology, is it perhaps time to reconsider the area of CISC vs risk in ISP design and also hardware organization. One criticism of CISC ISPs was that compilers were incapable of generatong many of the available machine instructions. So the hardware people removed such instructions from new designs. But is this still a valid consideration? Could a CISCier ISP be designed that modern compilers would now be able to make full use of and, that would provide benefits in code density, code simplicity-transparency etc. Note, I am arguing in favour of a Stretch or Harvest or Intel I8love like ISP, but perhaps something more like the a newer s-360 ... or MC68xx ISP both of which were praised for their organization, etc.

-- Rostyk