virtual memory 4517

On Fri, 2 Jun 2006, Andy Glew

Ooh... :)

This is just the kind of thing I'd love to learn more about!

Any idea about when the details can be released? As in, "how many years"? I realize the details of something like this might not make Intel sound good because AMD ended up defining the 64-bit extension instead of Intel moving their customers over to IA-64...

I'm very happy to hear that Intel actually did think about such things and so early, even. I would also have been very surprised if they didn't ;)

Can you give hints on how the 32 register thing would have worked?

How? With an alternative (two byte?) encoding of the REX bits? With a bit in the page table that marks the page as containing "full register set code", where the REX prefix was enabled? (I don't particularly like the last one)

If the former, would you let F2 in front of an instruction mean "use r8-r15 for the source register" and F3 mean "use r8-r15 for the destination register"? Using F2 + F3 could then mean "both source and destination registers are in the r8-r15 range" and F3 + F2 could mean... something I haven't really thought of. Maybe something with indexed addressing modes.

-Peter